It enables the consistent test application across the automated test equipment, system-level test, bench, and in-system ...

Scan testing has been the foundation of digital-device production test for many years. Several innovations have been developed to keep up with the growth in pattern-set sizes brought about by large ...

Test compression sounds like magic. Read on to learn how this trick is done. Large, complex ICs are viable because their design meets test as well as functional requirements. Design for test (DFT) was ...

For over 15 years, I've been a big proponent of hierarchical test. Hierarchical test is the commonly used term for creating DFT (design-for-test) features and test patterns at lower level circuit ...

It’s no secret that a successful yield ramp directly impacts integrated circuit (IC) product cost and time-to-market. Tools and techniques that help companies ramp to volume faster, while also ...

The Sarnoff Digital Test Pattern When I was approached about evaluating the Sarnoff Digital Test Pattern, my interest was piqued immediately. After all, it's been a long time since most of us have ...

Testing digital designs usually requires one or more digital signals, some of which can be very difficult to generate. Pattern generators are specifically designed to address this problem. Whatever ...